1. Field of the Invention
The present invention relates to a method of manufacturing semiconductor devices, such as a bipolar transistor and so on.
2. Description of the Prior Art
As a conventional bipolar transistor, a ultra-high speed bipolar transistor is proposed, in which a base lead-out electrode and an emitter lead-out electrode are made of a polycrystalline silicon film and base and emitter regions are formed in a self-alignment fashion.
FIG. 1 is a schematic diagram showing an example of such conventional ultra-high speed bipolar transistor. As shown in FIG. 1, a base lead-out electrode 7 made of a first p.sup.+ type polycrystalline silicon film is formed on an n-type epitaxial film 6 which will be served as a collector region 3 on a first conductivity type, e.g., p-type semiconductor substrate 2. A p.sup.+ type external base region 8 is formed by the impurity diffusion process into the epitaxial film 6. After a link base region 11 is formed by the ion implantation-process via an opening 10 selectively formed through the p.sup.+ type polycrystalline silicon film and an SiO.sub.2 film 9 formed on the p.sup.+ type polycrystalline silicon film in order to connect the external base region 8 and an intrinsic base region, an insulating side wall, i.e., an SiO.sub.2 side wall 12 is formed at the opening 10 and a second polycrystalline silicon film 13 is formed on the opening 10, whereby p-type impurities and n-type impurities are introduced into the second polycrystalline silicon film 13 to form a p-type intrinsic base region 4 and an n-type emitter region 5 in a self-alignment fashion, thus the second polycrystalline silicon film 13 being formed as an emitter lead-out electrode. In FIG. 1, reference numeral 14 denotes an n-type collector buried layer, 15 a p-type channel stopper region, 16 an n-type collector lead-out region, 20 a field insulating film, and 17, 18 and 19 a base electrode, a collector electrode and an emitter electrode made of metal (e.g., aluminum, Al), respectively.
In order for this ultra-high speed bipolar transistor to operate at higher speed in the future, it is important to reduce the base resistance R.sub.BB. more by reducing the resistance of the base-deriving electrode 7, which then requires the base lead-out electrode 7 to be made of silicide
FIGS. 2A through 2F are respectively manufacturing-process diagrams of a bipolar transistor, and illustrating an example of the manufacturing-process such that the base lead-out electrode is made of a polycide film.
Referring to FIG. 2A, a second conductivity type, i.e., n-type collector buried layer 14 and a p-type channel stopper region 15 are formed on one major surface of a silicon substrate 2 of, for example, a first conductivity type, i.e., p type and then an n-type epitaxial layer 6a is grown on the n-type collector buried layer 14. An n-type collector lead-out region 16 of high concentration also is formed so as to reach the collector buried layer 14, and a field insulating film 20 is formed by the selective oxidation-process over the entire surface except the collector lead-out region 16 and the region 6a in which base and emitter regions will be formed. Then, a thin SiO.sub.2 film 21 is formed on the whole surface and etched out at its portion corresponding to the region 6a, thereby a so-called polycide film 24 being composed of a first p.sup.+ type polycrystalline silicon film 22 serving as a base lead-out electrode and a metal silicide, for example, a tungsten silicide (WSi) film 23. Thereafter, the polycide film 24 is subjected to the patterning-process via a first resist mask 25.
In the next process, as shown in FIG. 2B, an SiO.sub.2 film 9 is deposited over the whole surface including the polycide film 24 treated by the patterning-process by a chemical vapor depostion (CVD)-process and then a second resist mask 26 is formed. Then, as shown in FIG. 2C, the SiO.sub.2 film 9 and the polycide film 24 are selectively etched away at their portions corresponding to an active region in which base and emitter regions will be formed by means of the second resist mask 26, thereby an opening 10 and a base lead-out electrode 7 made of the polycide film 24 being formed.
As shown in FIG. 2D, a thin thermally-oxidized film, i.e., SiO.sub.2 film 27 is formed on the surfaces of the polycrystalline silicon film 22 and the substrate silicon within the opening 10 by the thermal oxidation-process. Thereafter, the ion implantation of p-type impurities, e.g., boron is carried out through the SiO.sub.2 film 27 so as to form, for example, a link base region, or an intrinsic base region, a link base region 11 in this example, on the surface of the region 6a.
In the next process, as shown in FIG. 2E, an SiO.sub.2 film is deposited by the CVD-process and then the resultant CVD SiO.sub.2 film is densified by the heat treatment-process of about 900.degree. C. In this heat treatment-process, an external base region 8 is partly formed by the diffusion of boron from the p.sup.+ type polycrystalline silicon film 22. Thereafter, the so-called etch back-process is carried out to form an SiO.sub.2 side wall 12 on the side surface of the opening 10.
Then, a second polycrystalline silicon film 13 is formed in an opening 28 restricted by the side wall 12 by the CVD-process as shown in FIG. 2F. The polycrystalline silicon film 13 is treated by the ion implantation-process of p-type impurities (e.g., B or BF.sub.2) and then annealed, thereby a p-type intrinsic base region 4 being formed on the active region. Subsequently, the polycrystalline silicon film 13 is treated by the ion implantation-process of n-type impurities (e.g., arsenic) and annealed, thereby forming an n-type emitter region 5. Alternatively, the p-type and n-type impurities may be implanted on the polycrystalline silicon film 13 by means of the ion implantation technique and simultaneously annealed by the annealing-process, thereby the p-type intrinsic base region 4 and the n-type emitter region 5 being formed. In the annealing-process when the base and emitter regions 4 and 5 are formed, the external base region 8 is finally formed by the diffusion-process of boron from the p.sup.+ polycrystalline silicon film 22 at the same time. Thereafter, contact holes are formed through the SiO.sub.2 film 9, whereby a base electrode 17, a collector electrode 18 and an emitter electrode 18 made of metal (e.g., aluminum, Al) are formed. A ultra-high speed bipolar transistor 29 is manufactured in this fashion.
As a method of manufacturing a bipolar transistor by utilizing a polycrystalline silicon burying technique (see PP. 420 to 423 of IEDM 86), a method shown in FIGS. 3A through 3E is proposed.
As shown in FIG. 3A, an n-type collector buried layer 32 and a p-type channel stopper region 33 are formed on a p-type silicon substrate 31 and then an n-type epitaxial film 34 serving as a collector region is formed. A collector lead-out region 35 reaching the collector buried layer 32 is formed and a field insulating film 36 is formed by the selecting oxidation-process. After an Si.sub.3 N.sub.4 film 37 and a CVD SiO.sub.2 film 38 are formed, they are treated by the patterning-process to form openings 39 at their portions corresponding to base lead-out electrodes which will be formed later.
In the next process, as shown in FIG. 3B, a p.sup.+ polycrystalline silicon film 40a is formed over the entire surface and a resist film 41 is formed. Then, the etch back-process is performed to leave resist films 41 on level difference portions of the p.sup.+ polycrystalline silicon film 40.
Referring to FIG. 3C, the p.sup.+ type polycrystalline silicon film 40a is treated by the selective etching-process by utilizing the resist films 41 as the mask to thereby form a base lead-out electrode 40 of the p.sup.+ type polycrystalline silicon film 40a.
In the next process, as shown in FIG. 3D, the CVD SiO.sub.2 film 38 is selectively removed at its portions corresponding to the active region and the collector lead-out region 35 and the surface of the p.sup.+ type polycrystalline silicon film 40a of the base lead-out electrode 40 is treated by the selective oxidation-process, thereby an SiO.sub.2 film 41 being formed. At that time, p-type impurities are diffused from the p.sup.+ type polycrystalline silicon film to partly form an external base region 42.
The Si.sub.3 N.sub.4 film 37 is selectively removed by hot phosphoric acid and a p-type base region 43 is formed by implanting p-type impurities on the active region by the ion implantation-technique.
Then, a second n.sup.+ type polycrystalline silicon film 45a is formed and treated by the patterning-process to thereby form an emitter lead-out electrode 46 and a collector lead-out electrode 47. Thereafter, the second n.sup.+ type polycrystalline silicon film 45a is annealed and an n-type emitter region 44 is formed by the diffusion-process of n-type impurities from the n type emitter region 44.
In the next process, contact holes are formed and a base electrode 48, an emitter electrode 49 and a collector electrode 50, each made of metal such as aluminum, Al are formed, thereby a bipolar transistor 51 shown in FIG. 3E being manufactured.
The bipolar transistor 29 made by using the polycide film 24 as shown in FIGS. 2A through 2F has the following problems such that the reliability characteristic, is degraded, etc.
More specifically, after the openings 10 are formed through the SiO.sub.2 film 9 and the polycide film 24, in the manufacturing process shown in FIG. 20D, the surfaces of the polycrystalline silicon film 22 and the substrate silicon are treated by the thermal oxidation-process and then the ion implantation-process is performed so as to form the link base region (or the intrinsic base region) by means of the thin SiO.sub.2 film. In that thermal oxidation-process, because the metal silicide film 23 is exposed to the side wall of the opening 10, metal escapes into the SiO.sub.2 film 27 due to the so-called metal diffusion (i.e., out-diffusion) from the metal silicide film 23 and diffused into the active region, which leads to the occurrence of so-called metal contamination. The metal contamination brings about various troubles, such as the reduction of life time of carriers in the active region, the increase of a recombination current and so on. Further, in the thermal oxidation-process, a stress occurs in the polycide film 24, thus rendering the metal silicide film 23 and the SiO.sub.2 film 9 formed thereon being released from each other.
The bipolar transistor 51 made by utilizing the polycrystalline silicon burying technique as shown in FIGS. 3A to 3E has the following problems.
(i) The polycrystalline silicon 40a from which the base electrode is derived and the polycrystalline silicon 45a from which the emitter and collector electrodes are derived are formed independently, which unavoidably increases the manufacturing process.
(ii) The surface of the base lead-out electrode 40 is treated by the thermal oxidation-process by using the film 41 in order to insulate and separate the base lead-out electrode 40 and the emitter lead-out electrode 46 as described above. In this thermal oxidation process (selective oxidation-process utilizing the so-called Si.sub.3 N.sub.4 film as the mask), a crystal defect occurs due to a stress produced near the bird's beak of the thermally-oxidized film 41 so that, when the emitter region 44 is formed by the impurities diffusion from the n.sup.+ polycrystalline silicon 45a serving as the emitter lead-out electrode, the impurities are diffused at an increased speed. There is then the risk that a part of the emitter will go through the base region 43, which brings about an emitter-collector path leakage, resulting in the transistor characteristic of the bipolar transistor being degraded.
(iii) Since a so-called base contact width W between the base lead-out electrode 40 and the external base region 42 depends on an alignment among the field insulating film 36, the SiO.sub.2 film 38 and the opening 39 formed through the Si.sub.3 N.sub.4 film 37, the bipolar transistor cannot be densified sufficiently, which unavoidably limits the reduction of the base-collector path junction capacitance, thus hindering the bipolar transistor from being operated at high speed.